The RISC-V has been the talk of the town for quite some time now. It is an open standard Instruction Set Architecture (ISA), which is why it is in constant demand from companies – big and small including Apple, as mentioned in the ACM blog RISC-ing Everything To Win – The Apple Way by Ayush Saran. Recently, Apple announced that it is planning to replace its cores based on Arm M-series being used for Wi-Fi, Bluetooth and touchpad control by RISC-V. But, their main cores will still be powered by ARM ISA. The shift of interest of many companies from CISC ISA to RISC ISA for heavy-duty processing and the open source nature works wonders for RISC-V. But, what is this ARM vs RISC-V debate and what is open source?
“Nor are the most popular ISAs wonderful ISAs. 80×86 and ARM aren’t considered ISA exemplars”, opined Krste Asanović and David A Petterson (Chairman and Vice-Chairman respectively of the board of directors of the RISC-V Foundation) as ‘The Case for a Free, Open ISA’ in their paper published as “Instruction Sets Should Be Free: The Case For RISC-V”. The very same people are responsible for the inception and release of RISC-V.
The first attempt to implement the RISC concept at the University of California, Berkeley by David A Petterson was named RISC-I and was published in ACM’s International Symposium on Computer Architecture (ISCA) in 1981. Later in 2010, Prof. Krste Asanović and his graduate students started the RISC-V instruction set in May 2010 as part of the Parallel Computing Lab of which Prof. David Patterson was a Director. But, unlike most other ISA designs, RISC-V was provided under open source licenses. Open Source meant anyone could use it without getting locked into someone else’s processor designs or paying costly license fees.
Open standards and open source software – with networking protocols like TCP/IP and operating systems like Linux revolutionized the industry. The release of RISC-V to the open community in 2015 – for both standardization and ongoing improvement through open collaboration – marked the first time the hardware community embraced open-source standards and collaboration at this level.
The fundamental policy of RISC-V is to keep things simple which can be seen in the fact it follows little endian configuration as opposed to ARM’s bi-endian configuration. RISC-V is not over-optimized for one implementation. It has a modular approach, i.e., its ISA has a base set of features as well as optional extensions, such as floating-point math, that can be implemented as necessary. The reasoning behind this is that one can add their own custom solution to the floating point or use the one made by RISC-V. ARM raises concern that this could lead to ‘fragmentation’, which is basically a lack of standards throughout an industry that creates an obstacle for compatibility in both hardware and software. This is not a major concern for RISC-V as setting platform standards will make sure application developers’ code will run smoothly across many compatible chips. Some organizations may still prefer to work on their own extensions in private for commercial reasons.
Even though Intel has proprietary ownership of x86, it is a member of RISC-V international. This is because Intel has its own foundry to fabricate chips. So, the situation impels them to fabricate chips for its competitors to groom its foundry business. While this tactic works for Intel, it takes its toll on ARM. So, how is ARM able to keep up with the competition? Well, although RISC-V allows designers to develop processors for free, there is little to no support for hardware design. ARM has teams of engineers working on hardware technologies that make it simple for designers to incorporate ARM CPUs. Also, ARM offers a massive online community and libraries to develop processors.
ARM processors have also been strong in embedded applications. That strength is being challenged by RISC-V as it aids companies that need low-custom solutions. This includes automotive systems manufacturers, Internet of Things manufacturers or universities doing their research works. There are a lot of companies that have already started providing commercial RISC-V processor IPs. SiFive Company is one notable mention founded by none other than Prof. Krste Asanović. China is also betting high on RISC-V to achieve self-sufficiency in chips and to escape IP restrictions by the US. Alibaba Cloud is already close to getting Android working on RISC-V. As of now, it is still uncertain if RISC-V will bloom to its ultimate glory or if it would make up a tiny percentage of chips worldwide as the Linux Operating System did in the case of Operating Systems.
– Article by Anush Babu Shetty, 3rd year Department of Electronics and Communication Engineering